Design, Implementation, and Experimental Validation of a Low-Cost Autonomous Coelostat System for High-Stability White-Light Solar Imaging
This research work presents the design, implementation, and experimental testing of a low-cost autonomous coelostat. The coelostat uses a two-mirror system to keep the reflected sunbeam in a fixed position, while compensating for the Sun’s apparent motion in the sky. The coelostat control system is realized using a dsPIC33FJ128GP802 microcontroller in combination with a Raspberry Pi computer-based user interface, implementing an open-loop predictive tracking algorithm based on the NREL Solar Position Algorithm (SPA). With the introduction of the proposed design, there is no need for moving telescopes or optical sensors for feedback, therefore, the mechanical complexity and alignment of the optical components can be reduced significantly. A prototype of the coelostat with three gear-reduced axes of stepper motors (1:410) was developed and tested outdoors. A maximum beam displacement of less than 1 mm at a 3 m projection distance was observed, resulting in a tracking accuracy of 0.5–1.0 arcmin. These results prove that the proposed coelostat is compact, reliable, and affordable instrument for solar white light imaging and spectroscopy as well as educational applications.
Breath Based Pneumonia Detection Using Gas Sensors and Decision Tree Classifier with Risk Analysis
Pneumonia is a serious respiratory disease that necessitates immediate diagnosis in order to minimize the chance of complications and enhance the well-being of patients. Traditional techniques for diagnosis involve chest X-ray, laboratory testing, which are both time-intensive and costly. This article focuses on a framework for detecting pneumonia using breath analysis that utilizes multi-sensor gas sensing along with machine learning for non-invasive assessment of risks associated with it. This framework makes use of MQ-3, MQ-135, and BME680 sensors to analyze Volatile Organic Compounds (VOC) and environment. The collected data is preprocessed using Min-Max scaling technique, clustered using K-Means algorithm into different risk groups and then classified by using a Decision Tree Classifier. The experimental evaluation has resulted in 95.84% accuracy, 95.12% precision, 94.87% recall and 94.99% F1-Score. The proposed system is a cost-effective and portable approach for the early pneumonia detection.
ARM-Based Industrial Monitoring and Safety Control System Using STM32 Microcontroller
In recent time, industries are facing safety issues such as gas leakage, fires, abnormal temperature rise and water leakage, which can cause huge losses to enterprises by damaging equipment or halting production and risk the life of workers working in that area. In industrial environment, such safety hazards can be avoided by using an ARM based industrial monitoring and safety control system with STM32F103C8T6 microcontroller. In this paper, the MQ135 gas sensor, LM35 temperature sensor, flame sensor and water leak sensor is used to continuously monitor the environmental and security parameters. The STM32 processes the data received from sensors and compares them to the safety threshold limits to detect any threat. In case of normal parameters system, relay-based safety systems get activated and sound signals through buzzer are produced whereas warning messages are displayed on LCD Screen. The other feature area included the implementation of a monitoring dashboard that shows the sensor outputs.
RepViT-Based UAV Small Object Detection on VisDrone and UAVDT
The Unmanned Aerial Vehicles (UAVs), popularly referred to as drones, have gained increasing significance with respect to their use in applications like traffic monitoring, surveillance, disaster management, environmental observation, and precision agriculture. Despite substantial progress in aerial image sensing technologies, accurate object detection in UAV imagery has remained elusive owing to the issues related to small object sizes, object scale variance, motion blur, occlusions, and complexity of the background. The proposed study describes a RepViT architecture to enhance the detection of small objects. The proposed framework makes use of RepViT architecture, Feature Pyramid Network (FPN), and attention mechanism for enhancing discriminative features and suppressing background noise. The effectiveness of the proposed model was evaluated using benchmark UAV object detection datasets such as VisDrone and UAVDT using widely adopted object detection metrics. The proposed framework has sustained the inference rate of 48 frames per second (FPS).
UAVDT (Unmanned Aerial Vehicle Detection and Tracking)
E-Bike Motor Speed Controlling System using STM32 Microcontroller and PWM Feedback
This paper describes the design and development of an affordable motor speed control for e-bike systems based on the STM32F103C8T6 microcontroller and PWM feedback method. An analog Hall effect throttle is utilized in this design for generating a speed control signal. The speed of a brushless DC (BLDC) motor is controlled through the PWM generated with the help of the microcontroller. Real-time speed feedback is provided with the help of the Hall-effect sensor installed on the motor. The feedback speed is shown on the SSD1306 OLED display using the I²C communication interface. The design includes the IRF540N MOSFET motor driver circuit and the 7805/AMS1117 powered regulated power supply circuits. The embedded firmware programmed in the STM32CubeIDE acquires the throttle signal, generates PWM signal, calculates speed, and displays it on the OLED screen. Testing of the developed controller was performed experimentally in the form of hardware testing, speed calibration, and waveforms analysis. The maximum speed achieved during testing is about 3000 RPM along with stable PWM operation at 10 kHz and efficiency of 83.3%.
Design and Implementation of a SEC-DED-DAEC-STEC Error Control Code for Reliable Memory System
Modern memory systems are vulnerable to soft errors caused by radiation effects, electrical noise, and process variations, leading to single-bit and multi-bit upsets. The conventional error correction techniques like Hamming and SEC-DED codes have very few defenses against multi-bit complex fault models. In this paper, a (14,8) SEC-DED-DAEC-STEC code is proposed with capabilities of Single Error Correction (SEC), Double Error Detection (DED), Double Adjacent Errors Correction (DAEC) along with selective Triple Bit error pattern corrections. The proposed scheme uses six parity bits with syndrome lookup technique to correct the fault patterns. It is based on parity check matrix and syndrome based localization to increase the fault tolerance with moderate hardware cost. The Encoder/Decoder design has been developed using Verilog HDL and validated through Xilinx ISE environment. The experiment results prove successful correction of single bit, adjacent double bit and selective triple bit fault patterns whereas the uncorrectable faults are detected and flagged properly. The synthesis results of FPGA technology prove the maximum frequency and critical path delay as 182 MHz and 5.48 ns respectively.
Selected Triple-Bit Error Pattern Correction (STEC)
Design of Fuzzy Logic based Soft Starter for Induction Motor
Induction motors are extensively used across all industrial applications due to the robustness, comparatively less cost and very low maintenance. Nevertheless, at startup, this kind of motors pull a largely high current about several times larger than the rated value harming both. Several starting methods have been employed to minimize the in-rush current and overcome this problem. Previously, conventional starting methods: direct-on-line (DOL), star-delta and autotransformer starters have been utilized since they generally provide minimal relative control of starting performance. This paper presents a soft starting technique for three-phase squirrel cage induction motor using fuzzy logic controller (FLC) based approach. The proposed solution uses a power electronic AC voltage regulator to slowly decrease stator voltage at start up, which reduces start current and torque fluctuations. A fuzzy logic controller uses from linguistic rules and membership function in determining the control action, based on the inputs (current error and its derivative). Simulation and analysis validate the proposed method. The results clarify a significant drop in inrush current and attaining a soft torque which improves the overall performance and service life of the motor. The proposed system offers a more stable start and effective operation of motor cores over conventional starting method
Copyright (c) 2026 Journal of Electronics and Informatics
Neural Network based Soft Starting Technique for Squirrel Cage Induction Motor
The soft start of squirrel cage induction motors is highly imperative in order to avoid any excessive currents, torque pulses, and mechanical stresses. As a matter of fact, traditional Direct on Line (DOL) techniques of motor starting involve heavy current transients and torque pulses that tend to shorten the life of the motors and destabilize system performance. In this regard, this paper presents a soft starting scheme for a three-phase squirrel cage induction motor using an artificial neural network (ANN) based on a thyristor-controlled AC voltage controller. The proposed feed-forward multilayer perceptron (MLP) ANN model incorporates various motor operating parameters including motor current, speed, electromagnetic torque, and loading condition to provide optimal firing angles of the thyristors. The induction motor is represented in dq-coordinates while the MLP ANN is trained by means of backpropagation algorithm with the performance index being Mean Squared Error (MSE). From the MATLAB simulations, the results indicate that the proposed ANN model can significantly decrease the starting current from 90A to 30A and starting torque from 125N-m to 40N-m compared to the traditional DOL scheme.
Simulation and Implementation of 7-Level and 27-Level Cascaded H-Bridge Multilevel Inverter for Reduced THD Under R and RL Loads
In this paper, 7 and 27 levels of cascaded H-bridge Multilevel Inverter systems are modeled and implemented, where different sub-MLI devices are interconnected in series for producing a large amount of power. The main objective in this work is to achieve a higher output voltage with less power switches. Renewable energy sources are mostly in DC form and hence should be converted properly in DC-AC to be connected to the grid. This is achieved by inverters, and multilevel inverters are preferred as they are able to produce high-quality AC. The CHB-MLI is one of the most common types due to its modularity, simplicity and high quality output, to name a few. The more the number of DC voltage levels, the better the output voltage waveform approaches a pure sinusoidal waveform, and thus lower the harmonic distortion. This research aims to achieve a close to sinusoidal output waveform and to analyse system performance in terms of comparing the Total Harmonic Distortion (THD) of different levels of CHB-MLIs. 7-level inverter is implemented in hardware and the 27-level inverter is designed and analysed using MATLAB/Simulink and hardware for both resistive (R) and resistive-inductive (RL) loads.
SPWM - Sinusoidal Pulse Width Modulation
Resource-Efficient FPGA Implementation of a Self-Attention Core for Edge AI
The Modern AI relies on transformer-based architectures, they require considerable resource requirements along with substantial memory requirements for implementation in resource-limited deployments due to their inherent computational complexity. The use of Field Programmable Gate Arrays (FPGAs) to create an efficient hardware accelerator for self-attention within transformers will allow for efficient use of hardware resources while enabling the use of transformers as part of an edge AI system. This research describes the implementation of such a design using the Xilinx Artix-7 FPGA platform with the Nexys DDR development board and demonstrates the capability of self-attention within an FPGA-based hardware accelerator to produce results in real time through a pipelined multiply-accumulate (MAC) architecture and finite state machine (FSM) based control structures. In addition, the implementation of this hardware accelerator was able to achieve functional accuracy when compared to the Python Golden Model. The hardware accelerator produced low levels of both hardware utilization and power consumption while at the same time providing a efficient computational performance. The architecture provides a unique solution for balancing performance, resource utilization and energy efficiency. FPGA-based domain-specific accelerators have demonstrated their ability to bridge the computational gap presented by transformer self-attention mechanisms and would be an appropriate method for implementing real-time inference of edge AI systems.
Pressure Sensing on Natural Leaf Scaffolds
Flexible and sustainable pressure sensors have received considerable focus recently for use in wearable electronics, biometric monitoring, and human-machine interfaces. This study introduces a cheap, flexible pressure sensor using a composite material made of graphene and metal oxide deposited on a natural leaf scaffold. The hierarchical structure provided by the leaf scaffold improves the mechanical flexibility and sensitivity of the sensor. On the other hand, the composite layer enhances electrical conductivity and the piezoresistive effect. The sensor works based on the change in resistance when subjected to external pressure and uses a microcontroller to acquire and process data in real-time. A coin is used to calibrate the system to produce consistent pressure from 0.11 to 2.20 kPa. Finally, linear regression analysis is performed to obtain a correlation equation between the output voltage and pressure. Using this correlation, the output voltage can be predicted accurately without further calibration of the sensor.
Next Generation IoT Framework for Smart LPG Cylinder Monitoring, Safety Detection and Autonomous Refill Booking
The proposed Next-Generation IoT Framework for Smart LPG Cylinder Monitoring, Safety Detection, and Autonomous Refill Booking is an intelligent solution aimed at ensuring increased safety, energy savings, and convenience in LPG use. This system is comprised of sensors such as load sensor, gas leak detector, pressure and temperature sensor coupled with a low power microcontroller and wireless communication module like NB-IoT or LoRaWAN. Load sensor helps in determining the quantity of LPG left in the cylinder based on its current weight. The sensors can detect any leakage in the gas, changes in pressure and temperature, or any movement and raise instant alarm along with alerting remotely in real time. Cloud backend will carry out further analysis and trigger refill booking automatically with the help of gas services provider through secure API integration.
AI-Enabled Smart Bus System for Modern Urban Mobility
The rapid urbanization and increasing demand for efficient public transportation systems necessitate the adoption of intelligent and automated solutions to overcome the limitations of conventional transport management. Traditional bus systems, which rely on manual ticketing and human supervision, often suffer from issues such as revenue leakage, lack of transparency, inefficient passenger monitoring, and security vulnerabilities. This research presents an AI-Enabled Smart Bus System for Modern Urban Mobility that integrates Internet of Things (IoT), cloud computing, and machine learning techniques to enhance operational efficiency, safety, and user experience. The proposed system utilizes an ESP32 microcontroller as the central processing unit, interfaced with RFID-based smart card technology for contactless ticketing, IR sensors for accurate passenger counting, GPS module for real-time vehicle tracking, and ESP32-CAM for surveillance and unauthorized access detection. Passenger data is continuously collected and transmitted to a cloud-based platform for real-time monitoring and storage. Machine learning algorithms implemented in Python are employed for anomaly detection, fraud identification, and passenger demand prediction, enabling data-driven decision-making and optimized route management. Furthermore, an auxiliary Arduino Uno module is incorporated to handle seat selection and stop request operations, thereby improving system responsiveness and reducing computational load. The proposed framework ensures high accuracy, reduced human intervention, enhanced security, and efficient resource utilization. The results demonstrate that the system is scalable, cost-effective, and well-suited for deployment in smart city environments, contributing to sustainable and intelligent urban transportation systems.
Construction Site Worker’s Safety Detection System
The construction sites are one of the most dangerous workplaces, due to the presence of machinery, tall buildings, and unsafe practices at work. One of the main factors leading to accidents is the incorrect use of personal protective equipment (PPE) like safety helmets, safety glasses, safety footwear, and reflective jackets by employees. Besides, there are cases of undetected health problems that lead to injuries. Traditional approaches to safety monitoring involve human inspection and periodical examination of workers, which are time-consuming, prone to errors, and do not work effectively on large-scale construction sites. The goal of this research is the development of an intelligent worker safety detection algorithm for the smart construction site that would incorporate machine vision–based detection of PPEs and Internet of Things (IoT) technologies for health monitoring. The algorithm detects safety helmet and reflective jacket using machine vision based on deep learning algorithms, while body temperature is detected using a DS18B20 sensor interfaced with an ESP32 microcontroller. A decision-making mechanism confirms safety of the conditions and sends a warning message in case any violation or abnormal situation is observed.
Aqua Sense: Smart IoT System for Water Usage and Quality Monitoring
Water scarcity and water quality degradation are becoming significant global issues due to rapid urbanization and improper water management practices. This paper proposes a smart IoT-based system named Aqua Sense, which can be used for real-time monitoring of water consumption and water quality in water tanks, cities, and commercial areas. In the proposed system, water flow, water level, pH, TDS, and turbidity sensors are connected to an ESP32 microcontroller for real-time monitoring of water parameters. A threshold-based approach and an alert counter are used for efficient water parameter monitoring. Moreover, motor control is also included in the proposed system for efficient water management, which can prevent water overflow and motor dry running. All the operations of the proposed system are stored in a cloud database, which can be accessed remotely using a mobile or web-based application. The experimental results of the proposed system show efficient water parameter monitoring, water savings, and increased awareness of water consumption. The proposed system can be used as a cost-effective, efficient, and reliable solution for water management systems.
Intelligent Accident Prevention and Alert System Using Sensors and Machine Learning
Road accidents are one of the primary causes of death around the globe, and these can be avoided if timely actions are taken by the driver of the vehicle. This paper proposes a system known as the Intelligent Accident Prevention and Alert System, which makes use of various sensors and machine learning algorithms to predict potential hazards on the road in real time. This system utilizes data from various sensors such as accelerometers, gyroscopes, GPS, proximity sensors, and driver sensors. This data is fed into a feature extraction module, where a random forest algorithm is utilized to classify the level of risk of an accident occurring. Based on this, an alert signal is sent to the driver, enabling them to take timely action. A feedback mechanism has been included in the system to ensure dynamic risk assessment. The performance of the proposed system is evaluated through a scenario-based simulated dataset, and the results show an accuracy of 93.5%, thereby proving the efficiency and reliability of the proposed system in detecting hazardous driving conditions. The proposed system also provides timely alerts, thereby enhancing the efficiency and effectiveness of accident prevention. The results prove that the proposed system offers an efficient and effective solution for accident prevention in real-world applications.
Intelligent Accident Prevention System (IAPAS)
AI-Powered Real-Time Diagnosis of Neuromuscular Disorders Using EMG and Gait Analysis
The proposed project aims to develop an online diagnostic system that can optimally integrate gait analysis and electromyography (EMG) signal processing to diagnose neuromuscular and neurodegenerative diseases in patients. The proposed system can utilize computer vision to detect abnormal gait patterns in patients. The abnormal gait patterns can include abnormal stride patterns, shuffling gait, freezing gait, and balance problems. The proposed system can utilize an EMG sensor to detect muscle activity in patients. The EMG sensor can be connected to an ESP8266 module to send muscle activity data wirelessly to a computer system using a WebSocket server. An online dashboard can be created to visualize muscle activity and gait patterns in patients. The proposed system can be an affordable and mobile AI-based system that can aid in early disease diagnosis in patients and provide better accessibility to healthcare services.
High-Data-Retention 6T SRAM with Dual Sleep-Transistor Power-Gating and Duty-Cycle Aware Energy Analysis for Low-Power IoT Application
Static Random Access Memory (SRAM) is the main contributor to standby power dissipation in duty-cycled Internet of Things (IoT) systems. The paper presents a 6 transistor SRAM cell that has low leakage and dual sleep transistor-based power gating. The memory cell is mode aware and supports different modes of operation. The header PMOS and footer NMOS sleep transistors have been used to minimize leakage and retain stored information during extended periods of sleep. The proposed memory architecture is validated through 45 nm CMOS models and simulations in LT spice. The memory is able to achieve picoampere levels of supply current in deep sleep mode. A duty cycle aware analysis of energy dissipation is also presented. The analysis shows that the proposed memory is an effective solution for ultra-low-power memory in IoT systems.
Power Electronic and Embedded System Co-Design for Scalable Smart Energy Network Optimization
The existing electrical infrastructure changed into digital, distributed and renewable-based methods develop smart energy networks required for constant interaction of power devices with advanced control systems. The usage of electric cars, distributed energy resources and energy storage increased to allow two-way transfer of power, varied load response provide challenges to coordination, efficiency conversion and scalability operation. This study explains technological system for combining power electronic converters and embedded system architecture for scalable smart energy network optimization. The advanced converter architecture, temperature management, hardware optimization algorithms and integrated sensor interface provide effective operations of distributed energy systems. The embedded control platforms, communication infrastructure units and supervisory energy management techniques are the examples of multilayer architectural model. This research shows integrated hardware-software designs improve system ability for effective power regulation and scalability of distributed energy resource implementations. The detailed design data develops robust and smart power electronic infrastructures for next-generation smart energy networks.
Quantum Semiconductor Devices: Current Progress and Future Trends
Modern electronics are frequently used in quantum semiconductor devices. The devices are extremely small and their behavior cannot be described by traditional theories. The impacts include quantum confinement and tunneling. Several new quantum devices have been proposed in the past, including an examination of their theory and design. Additionally, new modeling methods are being developed. Atomic-scale production has been shown to be constantly increasing. This effort addresses several issues at the same time. As a result, the device's dependability remains a challenge, produce variations have an impact on performance, cooling and thermal management are not easy to perform. This study reviews recent achievements in quantum semiconductor devices. It discusses device characteristics, modeling and production methods. It also identifies current disadvantages and unsolved challenges that minimize future effort are addressed in detail.
Study on Thin-Film Transistor and Circuit Design Using Artificial Intelligence
This paper reviews the detailed inspection of the current situation of thin-film transistors (TFT) and circuit design using AI, its widespread applications, and the future changes that are about to take place in this field. In liquid crystal display (LCD) systems, thin-film transistors have bridged the gap between the technologies used in this application and have been employed in a wide variety of areas, such as flexible electronics, biological sensing, and integrated IoT platforms. The focus of the paper is on the areas where TFT is heading rather than those it has already traversed. A close look at the sectors reveals that high-resolution displays, where TFT is integrated, result from some vibrant circuits made on flexible substrates, which would not be possible without TFT. Artificial intelligence can be applied to predict and enhance manufacturing efficiency and to estimate costs more accurately. Integrating TFT thin-film transistors with AI integrated circuits in future electronic devices will represent a significant advancement in the field. The AI built-in circuit type augmented by thin-film transistors would unlock visionary progress in entrenched high-tech areas and provide a unique and innovative gateway for businesses and researchers.
Analysis of Learning-Based Methods for Intelligent Edge Computing
Edge Computing is recognized as an important computing paradigm that helps in the processing of data as well as the making of decisions near the user, hence reducing the need to rely on cloud infrastructure. Edge Computing is of high importance in fields that are sensitive to latency, such as smart vehicles, IoT services, health monitoring, UAVs, and smart cities. Edge Computing environments face various issues, such as limited computational power, network variability, mobility, and the need to process high volumes of diverse tasks. These issues in edge computing are difficult to handle using traditional methods of optimization. Deep Reinforcement Learning (DRL) algorithms are significantly used in edge computing systems as an intelligent decision-making tool that can optimize decisions through interactions with the edge computing system. This review paper presents a comprehensive analysis of recent studies and representative research that apply DRL techniques to edge computing systems. The reviewed papers cover various applications such as vehicular edge computing, IoT-based multi-access edge computing, UAV-assisted edge computing, collaboration between fog and cloud computing, and blockchain and federated learning-based edge computing systems. The discussion on DRL applications encompasses task offloading, resource management, workload management, caching, and mobility management. A comparative analysis discusses the most used DRL algorithms and their applications along with performance improvements. Additionally, this literature review highlights some of the main drawbacks of DRL, such as training complexity, scalability, privacy, and deployment, and identifies areas that require improvement to create safe and efficient DRL-based edge computing solutions.
An Area Efficient Lifting Wavelet for ECG R-peak Detection Applications
Noise removal is a vital pre-processing step in wearable ECG devices for accurate arrhythmia detection. This paper proposes a hardware-efficient, multiplier-less FPGA architecture for ECG denoising using a lifting-based wavelet transform. A universal thresholding function with soft thresholding enhances signal quality, while a modified lifting-based DWT eliminates multipliers and simplifies computation. An optimized median calculation and thresholding method remove the need for comparators in VLSI design. ECG data from the MIT-BIH databases validate the approach, achieving an SNR improvement of 7.4 dB and an MSE of 0.0206. FPGA implementation on the Nexys 4 DDR board demonstrates low hardware usage and a high operating frequency of 166 MHz, outperforming existing designs.
EdgeSNN-RT: Low-Overhead Spiking Simulation on Embedded GPUs for On-Device Intelligence
EdgeSNN-RT proposes a Python-managed, GPU-accelerated spiking neural network simulation method optimized for edge platforms, integrating their definition, execution, and, critically, low-cost host-device synchronization. A dense spike bitfield logging tool groups spikes on the device, obviating the need for one-timestep communication, yielding up to 10x cost savings for logging spikes. Experiments conducted for full-scale cortical microcircuit simulation and long-term conditioning tasks with large time horizons range across variant models of diversified, consumer-class, and larger-scale, heterogeneous GPUs, from the low-power, as-specified, 15W Jetson Xavier NX, to measure the latency, kernel execution time, and interpretative overheads of their execution in the real-time regime specifically for the purposes of the challenge. The system supports real-time or faster simulation execution for today’s leading-class GPUs, and, for shared-memory architectures of embedded platforms, preserves their leading performance with direct, low-level control, NumPy direct views to the managed buffers, and an events-based representation of plasticity within a convenient API. On-device inference and learning of spiking neural networks for real-world tasks will become feasible for networks of the described architecture based on this work, mapping telemetry, memory representation, and scheduling approaches to fit within limitations imposed by embedded platforms, supplanting today's restricted assumptions about direct, one-step execution communication and/or awaiting improvements in physical implementation technology for general programmed computation targets from desktop workstations back toward rudimentary, network-edge platforms in an industry led by programmability for applied innovation.
Copyright (c) 2025 Journal of Electronics and Informatics
Bioinformatics-Driven Automation in Hydroponics: Nutrient Management System and Growth Prediction Model
Effective nutrient management is needed for hydroponic farming. Herein, a bioinformatics-driven automation system that incorporates growth prediction models, automated dosing of nutrients, and real-time analysis of sensor data for optimal plant growth is introduced. For control and monitoring in real-time, a microcontroller is coupled with calibrated TDS, pH, and EC sensors. TDS differentials are used to predict nutrient uptake, and a pH- and EC-based regression model is employed to predict plant height. The technique was validated using a range of plants like tomatoes, lettuce, and beans. Without relying on IoT infrastructure, the outcome is higher nutrient efficiency and accurate height prediction, offering a scalable and cost-effective alternative to existing systems.
Optimized Double Tail Comparator based ADC for High Speed and Low Power Applications
Dynamic regenerative comparators are being used to increase speed and power efficiency in response to the need for ultra-low-power, area-efficient, and high-speed analog-to-digital converters. This study suggests using two transistors to create a low power double-tail comparator for the Flash Analog-to-Digital Converter. Designing a comparator and thermometer code to binary code converter at low supply voltage and low power dissipation is a challenging task in the creation of a low power Flash ADC. The primary goal is to construct comparators in order to achieve a high-speed Flash ADC. We should design each comparator to have a lower total power consumption because the comparators in Flash ADC are power-hungry components. Here, a low-power dynamic comparator is being designed. Next, we used a 2:1 MUX based on pass transistor logic to construct an encoder block. We have constructed a 5-bit Flash ADC using these components. To lower the Flash ADC's power consumption, a comparator and encoder are implemented utilizing dynamic CMOS circuitry. The Tanner EDA back-end tool is used to run the simulation.
Enhancement of Underwater Images using Texture Distribution Mapping Method
In either situation, underwater vision is affected by low light, diffraction, and color aberrations that lead to image distortion. To prevent this, we implemented a Texture Distribution Mapping Approach for undersea image improvement using MATLAB. Under this framework, we will enhance texture distribution, contrast, and visibility in general by controlling the most relevant properties of texture in the underwater environment. The TDM process is incremental: it involves pre-processing to eliminate noise and color distortion, followed by enhancement using another method for texture improvement. By enhancing texture mapping onto the image, we achieve a balance of visibility in high-texture regions, resulting in low-texture regions and better clarity and coloring. The method was compared against real underwater image data sets and tested for performance using quality measures like UCIQE (Underwater Color Image Quality Evaluation) and UIQM (Underwater Image Quality Measure). Experimental results and MATLAB implementation of the proposed algorithm exhibited stunning improvements in image quality and luminosity enhancements in texture compared to baseline methods, especially in challenging water conditions.
Performance Analysis of High-Speed Parallel Prefix Adders for Arithmetic Applications
Research on affordable adder architectures has been spurred by the need for high-performance arithmetic in digital and embedded signal processors. Carry propagation affects speed, area, and power consumption by limiting two-operand addition, a fundamental operation in these systems. Because of their versatility in modifying particular performance metrics, Parallel Prefix Adders (PPAs) represent a viable substitute. The performance of various PPAs, including Kogge-Stone, Sparse Kogge-Stone, Spanning Tree, Brent-Kung, Han-Carlson, and Ladner-Fischer, on a Virtex-7 FPGA with Xilinx Vivado 2022.2 is investigated in this paper. The findings imply that each PPA design performs well in its own way and that no single design can offer the best balance of power, latency, and area. By taking performance parameter trade-offs into account, the research helps designers choose the best PPA for their design needs.
Digital Signal Processors (DSP). Parallel Prefix Adders (PPAs)
FPGA Based 32-Bit Hybrid Ripple Ling Carry Adder
The 32-bit Hybrid Ripple Ling carry adder uses a Ling-based parallel prefix adder for the upper 16 bits and a ripple-carry adder (RCA) for the lower 16 bits to optimize performance, power, and area efficiency for VLSI designs. While the Ling adder speeds up carry propagation for larger bits, the RCA minimizes area and power for smaller bit-widths. This hybrid structure offers high-speed, low-power operation while saving 12% power, 30%–40% area, and a worst-case delay of 0.182 ns in a 28 nm process. The adder employs a Ling-based parallel prefix topology for the higher-order bits. A re-expression of the carry-lookahead technique is used to construct ling adders, which reduce the complexity of the carry-propagation process and allow for a higher speed carry calculation. The Ling adder's parallel prefix character suggests that multiple bits' carry signals are computed in parallel, significantly reducing the total delay. For the higher-order bits, where the carry chain length would normally be the dominant critical path, this speedup is especially important. The hybrid adder increases the global speed of the addition operation by reducing the critical path by using a Ling adder for the upper bits. The Xilinx Zynq-7000 SoC is used for the implementation.
Development of a Hybrid Energy Storage System using Batteries and Supercapacitors
The development of hybrid energy storage systems (HESS), which combine batteries and supercapacitors, has accelerated due to the need for dependable and efficient energy storage. Batteries have a high energy density, but their lifespan and charge/discharge rates are limited. Supercapacitors, on the other hand, have a lower energy capacity but offer long life and quick charging. This paper presents a low-cost, practical HESS for real-time energy delivery that uses inverter output control, supercapacitor buffering, and voltage regulation based on the LM317. Improved efficiency (up to 96%), thermal stability, and voltage regulation under variable load conditions are confirmed by experimental results. Applications for the system include solar-integrated energy units, UPS systems, and EVs.