1.
Muralidharan K, Maheswari SU. Design of Low Power Cam Memory Cell for the Next Generation Network Processors. IRO J. Sustain. Wirel. Syst. [Internet]. 2021 Dec. 3 [cited 2026 Sep. 22];3(4):208-1. Available from: https://irojournals.com/irosws/article/view/1142