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Gas Leakage Detection in Pipeline by SVM classifier with Automatic Eddy Current based Defect Recognition Method
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A Review on Data Securing Techniques using Internet of Medical Things
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Machine Learning Algorithms Performance Analysis for VLSI IC Design
Volume-3 | Issue-2
Maximizing the Prediction Accuracy in Tweet Sentiment Extraction using Tensor Flow based Deep Neural Networks
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Assimilation of IoT sensors for Data Visualization in a Smart Campus Environment
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DDOS ATTACK DETECTION IN TELECOMMUNICATION NETWORK USING MACHINE LEARNING
Volume-1 | Issue-1
Gas Leakage Detection in Pipeline by SVM classifier with Automatic Eddy Current based Defect Recognition Method
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Design an Adaptive Hybrid Approach for Genetic Algorithm to Detect Effective Malware Detection in Android Division
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Comparison of Stock Price Prediction Models using Pre-trained Neural Networks
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Construction of a Framework for Selecting an Effective Learning Procedure in the School-Level Sector of Online Teaching Informatics
Volume-3 | Issue-4
Machine Learning Algorithms Performance Analysis for VLSI IC Design
Volume-3 | Issue-2
Efficient Two Stage Identification for Face mask detection using Multiclass Deep Learning Approach
Volume-3 | Issue-2
Characterizing WDT subsystem of a Wi-Fi controller in an Automobile based on MIPS32 CPU platform across PVT
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Ethereum and IOTA based Battery Management System with Internet of Vehicles
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Volume - 3 | Issue - 2 | june 2021
Published
14 July, 2021
The design of an analogue IC layout is a time-consuming and manual process. Despite several studies in the sector, some geometric restrictions have resulted in disadvantages in the process of automated analogue IC layout design. As a result, analogue design has a performance lag when compared to manual design. This prevents the deployment of a large range of automated tools. With the recent technical developments, this challenge is resolved using machine learning techniques. This study investigates performance-driven placement in the VLSI IC design process, as well as analogue IC performance prediction by utilizing various machine learning approaches. Further, several amplifier designs are simulated. From the simulation results, it is evident that, when compared to the manual layout, an improved performance is obtained by using the proposed approach.
KeywordsVLSI IC design placement performance analysis machine learning
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