A., Jerome Albert; V., Jenifer Gloria Daphne; S., Vigneshwaran; K., Mariammal. Development and Realization of a Multi-Rate FIR Filter Utilizing Distributed Arithmetic on FPGA. Journal of Electrical Engineering and Automation, [S. l.], v. 6, n. 4, p. 343–357, 2025. DOI: 10.36548/jeea.2024.4.006. Disponível em: https://irojournals.com/iroeea/article/view/382. Acesso em: 21 mar. 2026.