Journal of Electronics and Informatics
IRO Journals
Volume 6 — Issue 2 — June 2024

Camera Interfacing with FPGA for IC Segregation

https://doi.org/10.36548/jei.2024.2.002
Dhanush M
Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Anna University, Madurai
Dinesh R
Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Anna University, Madurai
Vinoth Thyagarajan V
Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Anna University, Madurai
Rajaram S
Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Anna University, Madurai
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How to Cite

M, Dhanush, Dinesh R, Vinoth Thyagarajan V, and Rajaram S. 2024. “Camera Interfacing With FPGA for IC Segregation”. Journal of Electronics and Informatics 6 (2): 85-98. https://doi.org/10.36548/jei.2024.2.002.
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Keywords

— Conveyor
— Sobel
— Orientation
— Segregation
— Classification.
Published: 22-05-2024

Abstract

This research introduces a ground breaking approach for the segregation of Integrated Circuits (ICs) using FPGA (Field Programmable Gate Arrays) -based automation. The proposed system integrates mechanical and digital components to efficiently orient, sequence, identify, and classify ICs, thereby streamlining the segregation process. Key features include orientation rectification using a vibrator-like model to ensure proper IC alignment, and sequencing through a servo motor-controlled conveyor belt that organizes the ICs systematically. Identification of ICs is achieved through image capture coupled with Sobel edge detection, allowing precise recognition of different IC types. Classification is then performed using a servo motor-controlled funnel to accurately sort the ICs into designated categories. The FPGA orchestrates the control of these components, ensuring seamless coordination and enhancing the efficiency and accuracy of the IC segregation process. This innovative system promises significant improvements in the automation and speed of IC segregation, reducing manual intervention and error rates.

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