Abstract
The research presents a streamlined approach for modelling Current Steering Digital-to-Analog Converters (DACs) by using ideal current sources. DACs are essential components in electronics, converting digital signals into analog voltages or currents. Traditional modelling methods can be intricate and computationally demanding. The proposed method abstracts DAC behaviour using ideal current sources, specifically customized for 6-bit Current Steering DACs. This simplified model offers practical benefits for system-level simulations and rapid prototyping, featuring reduced complexity and enhanced speed. Additionally, the research explores increasing the sampling rate from 300MHz to 500MHz, opening up potential applications in fields such as audio processing and industrial automation. This approach presents a promising direction for DAC design and optimization, addressing the evolving needs of modern electronic systems.
References
- Narayanan, Anand, Mikael Bengtsson, Rengarajan Ragavan, and Quoc-Tai Duong. "A 0.35 μm CMOS 6-bit current steering DAC." In 2013 European Conference on Circuit Theory and Design (ECCTD), IEEE, 2013. 1-4.
- Patel, Sneha, and Usha Mehta. "A 1.8 V 5-bit Segmented Current Steering Digital-to-Analog Converter." In 2021 Devices for Integrated Circuit (DevIC), IEEE, 2021. 569-571.
- Khandagale, Sachin, and Santanu Sarkar. "A 6-Bit 500 MSPS segmented current steering DAC with on-chip high precision current reference." In 2016 International Conference on Computing, Communication and Automation (ICCCA), IEEE, 2016. 982-986.
- Dai, Lan, and Zhi-bo Fu. "A Behavior Model Based on Verilog-A for 14 Bits 200MHz Current-Steering DAC." In 2012 International Conference on Control Engineering and Communication Technology, IEEE, 2012. 451-454.
- Chakir, Mostafa, Hicham Akhamal, and Hassan Qjidaa. "A low power 6-bit current-steering DAC in 0.18-μm CMOS process." In 2015 Intelligent Systems and Computer Vision (ISCV), IEEE, 2015. 1-5.
- Sadda, AlajaKumari, and Niraja Madavaneri. "A Study of Output Impedance Effects in Current-Steering Digital-to-Analog Converters." (2013).
- K. G. P. D. Dilip Tamboli, "ANALOG TO DIGITAL CONVERTER IN CADENCE," Journal of Emerging Technologies and Innovative Research (JETIR), vol. 10, no. 5, 2023. 124-128.
- Su, Shiyu, and Mike Shuo-Wei Chen. "High-Speed Digital-to-Analog Converter Design Towards High Dynamic Range." In 2022 IEEE Custom Integrated Circuits Conference (CICC), IEEE, 2022. 1-8.
- Marin, Mihai-Eugen, Cătălin Brînzei, Florin Constantinescu, Alexandru Gheorghe, and Iulian Ursac. "Design of a 8 bit current-steering DAC for a GSM transmitter." In 2014 International Symposium on Fundamentals of Electrical Engineering (ISFEE), IEEE, 2014. 1-5.
- Jung, Jaejin, Kwang-Hyun Baek, Shin-Il Lim, Suki Kim, and Sung-Mo Kang. "Design of a 6 bit 1.25 GS/s DAC for WPAN." In 2008 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2008. 2262-2265.
