IRO Journals
Journal of Trends in Computer Science and Smart Technology

Dual-Metric Detection of Synthesis-Masked Hardware Trojans in AES-256: Correlating Power Signatures with Switching Activity

Open Access
Published: 24 April, 2026
Pages: 243-266
  • Rahimunnisa K. , Rahimunnisa K.
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
  • Aadhitya G. , Aadhitya G.
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
  • Abhyjeet J. , Abhyjeet J.
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
  • Dharnesh S. Dharnesh S.
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
    Department of Electronics and Communication Engineering, Easwari Engineering College, Anna University, Chennai, India
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How to Cite

K., Rahimunnisa, Aadhitya G., Abhyjeet J., and Dharnesh S. 2026. “Dual-Metric Detection of Synthesis-Masked Hardware Trojans in AES-256: Correlating Power Signatures With Switching Activity”. Journal of Trends in Computer Science and Smart Technology 8 (2): 243-66. https://doi.org/10.36548/jtcsst.2026.2.003.
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Keywords

Hardware Trojans
AES-256
Power Analysis
Synthesis Masking
Negative Power Signature
Switching Activity Analysis

Abstract

Hardware Trojans can be accidentally hidden due to synthesis optimizations performed by electronic design automation tools in cryptosystems, leaving important detection gaps in the process. In this study, the impact of synthesis on the power signatures of AES-256 cores has been analyzed based on power/net switching correlations. Four hardware Trojans have been synthesized targeting the 7nm Versal technology of Xilinx and have been simulated over the course of 10,000 clock cycles across 714 different key/plaintext combinations. The results showed that three hardware Trojans exhibited unexpected negative power deviations, although they incorporated malicious logic in their structures. Two separate categories of synthesis interactions can be observed from switching distribution histograms over 646 nets and KL divergence statistics (0.03–0.42): synthesis-masked dormant Trojans with lower toggles and leftward-shifting distributions, and synthesis-neutralized active Trojans with 40% more active nets and lower power. This two-fold correlation method allows for detecting synthesis-affected Trojans that cannot be identified through conventional power-overhead analysis methods, achieving reproducible structural detection supported by dual-metric cross-validation (Z-scores -0.62 to -0.77), despite individual signatures falling below the conventional 3σ detection threshold.

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