Design and FPGA Based Realization of an SMC-ESO Enhanced Nonlinear Fractional Order PID Controller for BLDC Motor Speed Control

Extended State Observe Nonlinear Fractional-order PID (NLFOPID) algorithm and Sliding Mode Control (SMC) are utilized for controlling the speed of a BLDC motor in this research study. The slow response time of the traditional PID controller makes it inefficient. FOPID controller is optimized to control the speed of the BLDC motor utilizing the SMC-ESO alongside it to overcome the shortcomings of traditional controllers. BLDC motors are suitable for many applications because they use permanent magnets to provide high torque over a broad range of speeds. The FOPID controller offers improved precision in control, SMC provides immunity to disturbance, and ESO provides real-time estimation of the state. The controller under consideration achieves ±1 RPM constant speed accuracy, under 5 % overshoot, and approximately 0.3 s settling time with 2 150 look-up tables, 1 800 flip-flops, 10 DSP slices and 2 BRAMs in the FPGA, demonstrate better accuracy and efficiency compared to standard PID and FOPID controllers. For a real-time system, it is implemented on a Field Programmable Gate Array (FPGA) due to its high processing capacity.